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46 #ifndef _CL_IOC_SERVICES_H_
47 # define _CL_IOC_SERVICES_H_
67 # define CL_IOC_DEFAULT_COMMPORT 0x0000
73 # define CL_IOC_CPM_PORT 0x0001
78 # define CL_IOC_EVENT_PORT 0x0002
83 # define CL_IOC_MSG_PORT 0x0003
88 # define CL_IOC_LOG_PORT 0x0004
93 # define CL_IOC_NAME_PORT 0x0005
98 # define CL_IOC_DSHM_PORT 0x0006
103 # define CL_IOC_DIAG_PORT 0x0007
108 # define CL_IOC_FAULT_PORT 0x0008
113 # define CL_IOC_GMS_PORT 0x0009
118 # define CL_IOC_DLOCK_PORT 0x000a
123 # define CL_IOC_TXN_PORT 0x000b
128 # define CL_IOC_CKPT_PORT 0x000c
133 # define CL_IOC_COR_PORT 0x000d
138 # define CL_IOC_CM_PORT 0x000e
143 # define CL_IOC_HPI_PORT 0x000f
148 # define CL_IOC_SNMP_PORT 0x0010
153 # define CL_IOC_ALARM_PORT 0x0011
158 # define CL_IOC_DEBUG_PORT 0x0012
163 # define CL_IOC_UM_PORT 0x0013
168 # define CL_IOC_DM_PORT 0x0014
173 # define CL_IOC_ALARM_APP_PORT 0x0015
179 # define CL_IOC_AMS_PORT 0x0016
184 # define CL_IOC_XPORT_PORT 0x0017
189 # define CL_IOC_GMS_UCAST_PORT 0x0018
194 # define CL_IOC_GMS_MCAST_PORT 0x0019
199 # define CL_IOC_ASP_PORTS_END (CL_IOC_RESERVED_PORTS - 1)
206 # define CL_IOC_USER_APP_WELLKNOWN_PORTS_START (CL_IOC_RESERVED_PORTS + 0x00)
207 # define CL_IOC_USER_APP_WELLKNOWN_PORTS_END (CL_IOC_RESERVED_PORTS + CL_IOC_USER_RESERVED_PORTS - 1)
213 # define CL_IOC_EPHEMERAL_PORTS_START (CL_IOC_RESERVED_PORTS + CL_IOC_USER_RESERVED_PORTS + 0x00)
214 # define CL_IOC_EPHEMERAL_PORTS_END (CL_IOC_MAX_COMP_PORT)
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